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  1. JDK
  2. JDK-6660833

[1.4.2] : 2 incorrect right shift operation in compiler2 in 1.4.2(Itanium2)

    Details

    • Type: Bug
    • Status: Closed
    • Priority: P3
    • Resolution: Duplicate
    • Affects Version/s: 1.4.2_16
    • Fix Version/s: None
    • Component/s: hotspot
    • Labels:
    • Subcomponent:
    • CPU:
      itanium
    • OS:
      linux_redhat_3.0

      Description

      The customer reported 2 possible problems in shift operation in compiler2.

      CONFIGURATION :
      OS : Red Hat Enterprise Linux Server release 5 (Itanium)
           Red Hat Enterprise Linux AS release 4 (Itanium)
      JDK : 1.4.2_14 / 1.4.2_16 Server VM

      1. unsigned right shift operation and shift distance is more than 32

      1.4.2_16/hotspot/src/cpu/ia64/vm/ia64.ad:
      .....
        3363 enc_class emit_shruI_reg_imm6( gRegI dst, gRegI src, gRegI cnt, pReg qp ) %{
        3364 MacroAssembler _masm(&cbuf);
        3365 if ( (int)$cnt$$constant < 32 )
        3366 __ extru( as_PredicateRegister($qp$$reg), as_Register($dst$$reg), as_Register($src$$reg),
        3367 (int)$cnt$$constant, 32 - (int)$cnt$$constant );
        3368 else
        3369 __ extru( as_PredicateRegister($qp$$reg), as_Register($dst$$reg), as_Register($src$$reg), 31, 1 );
        3370 %}
      ....

      At line#3369, the following code is generated.

        0x2000000005b64a12: extr.u r48=r49,31,1;;

        left-hand operand is positive number : the result is always 0.
        left-hand operand is negative number : the result is always 1.

      2. signed right shift operation and shift distance is more than 32

      1.4.2_16/hotspot/src/cpu/ia64/vm/ia64.ad:
      .....
        3383 enc_class emit_sarI_reg_imm6( gRegI dst, gRegI src, gRegI cnt, pReg qp ) %{
        3384 MacroAssembler _masm(&cbuf);
        3385 if ( (int)$cnt$$constant < 32 )
        3386 __ extr( as_PredicateRegister($qp$$reg), as_Register($dst$$reg), as_Register($src$$reg),
        3387 (int)$cnt$$constant, 32 - (int)$cnt$$constant );
        3388 else
        3389 __ extr( as_PredicateRegister($qp$$reg), as_Register($dst$$reg), as_Register($src$$reg), 31, 1 );
        3390 %}
      .....

      At line#3389, the following code is generated.

        0x2000000005b64a12: extr r48=r49,31,1;;

        left-hand operand is positive number : the result is always 0.
        left-hand operand is negative number : the result is always -1.

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              • Assignee:
                kevinw Kevin Walls
                Reporter:
                tbaba Tadayuki Baba (Inactive)
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