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  1. JDK
  2. JDK-8179954

AArch64: C1 and C2 volatile accesses are not sequentially consistent

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    Details

    • Type: Bug
    • Status: Closed
    • Priority: P2
    • Resolution: Fixed
    • Affects Version/s: 8-aarch64, 9
    • Fix Version/s: 9
    • Component/s: hotspot
    • Labels:
    • Subcomponent:
    • Resolved In Build:
      b170
    • CPU:
      aarch64
    • Verification:
      Not verified

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        Description

        In C2 we use LDAR/STLR to handle volatile accesses, but in C1 and the interpreter we use separate DMB instructions and relaxed loads. When used together, these do not form a sequentially-consistent memory ordering. For example, if stores use STLR and loads use LDR;DMB a simple Dekker idiom will fail.

        This is extremely hard to test because the loads and stores have to be in separately-compiled methods, but it is incorrect, and likely to fail in very weakly-ordered implementations.

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                Assignee:
                aph Andrew Haley
                Reporter:
                aph Andrew Haley
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                  Created:
                  Updated:
                  Resolved: