Uploaded image for project: 'JDK'
  1. JDK
  2. JDK-8261142

AArch64: Incorrect instruction encoding when right-shifting vectors with shift amount equals to the element width

    XMLWordPrintable

    Details

    • Subcomponent:
    • Resolved In Build:
      b13
    • CPU:
      aarch64
    • OS:
      generic
    • Verification:
      Verified

      Description

      In vectorAPI, when right-shifting a vector with a shift equals to the element width, the shift is zero in fact, see src/jdk.incubator.vector/share/classes/jdk/incubator/vector/VectorOperators.java:
          /** Produce {@code a>>>(n&(ESIZE*8-1))}. Integral only. */
          public static final /*bitwise*/ Binary LSHR = binary("LSHR", ">>>", VectorSupport.VECTOR_OP_URSHIFT, VO_SHIFT);

      For the JAVA code below on aarch64, assembler call `__ ushr(dst, __ T8B, src, 0)` to generate the instruction.
      While the instruction is actually encoed into `ushr dst.4H, src.4H, 16` in fact, which produces wrong results.
      ByteVector vba = ByteVector.fromArray(byte64SPECIES, bytesA, 8 * i);
      vbb.lanewise(VectorOperators.ASHR, 8).intoArray(arrBytes, 8 * i);

      According to local tests for this case, JDK gives wrong results for byte/short and crashes with SIGILL for integer/long.

      The legal right shift amount should be in the range 1 to the element width in bits on aarch64:
      https://developer.arm.com/documentation/dui0801/f/A64-SIMD-Vector-Instructions/USHR--vector-?lang=en

        Attachments

          Issue Links

            Activity

              People

              Assignee:
              dongbo Dong Bo
              Reporter:
              dongbo Dong Bo
              Votes:
              0 Vote for this issue
              Watchers:
              5 Start watching this issue

                Dates

                Created:
                Updated:
                Resolved: