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  1. JDK
  2. JDK-8271567

AArch64: AES Galois CounterMode (GCM) interleaved implementation using vector instructions

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    • Subcomponent:
    • Resolved In Build:
      b17
    • CPU:
      aarch64

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        Description

        Given that some AArch64 implementations can issue 2-4 AESE or AESMC instructions per clock cycle, and that these instructions have a latency of 2-3 clocks, we should be able to at least double the speed of AES on Aarch64 by interleaving 2-4 AES encryptions.

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                Assignee:
                aph Andrew Haley
                Reporter:
                aph Andrew Haley
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